As is known in the art, trace buffers are used to record activity on, for example, a system bus. For example, in a system where a CPU is coupled to a memory (e.g., a RAM) through a CPU bus, the trace buffer may be used to record activity of the CPU bus. More particularly, for each bus cycle, the digital word on the bus produced by the CPU may be recorded and stored in the trace buffer for later analysis in detecting and evaluating faults which may be produced by the CPU. The trace buffer may store the address, data, and control/status signals active for each bus cycle. One such trace buffer is described in my U.S. Pat. No. 6,611,879 issued Aug. 26, 20003 entitled “Data Storage System Having Separate Data Transfer Section and Message Network with Trace Buffer” assigned to the same assignee as the present invention. As is also known in the art, double data rate (DDR) memories are being used to increase the performance of data storage and other data systems. Thus, it would be desirable to provide a trace buffer system for use with a DDR Memory.